? 2011 fairchild semiconductor corporation www.fairchildsemi.com fds6911 rev c1 fds6911 dual n-channel logic level powertrench ? mosfet 20v, 7.5a, 13m general description these n-channel logic level mosfets are produced using fairchild semiconductor?s advanced powertrench process that has been especially tailored to minimize the on-state resistance and yet maintain superior switching performance. these devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required. features ? r ds (on) = 13 m @ v gs = 10 v r ds (on) = 17 m @ v gs = 4.5 v ? fast switching speed ? low gate charge ? high performance trench technology for extremely low r ds(on) ? high power and current handling capability s d s s so-8 d d d g d1 d1 d2 d2 s1 g1 s2 g2 pin 1 so-8 4 3 2 1 5 6 7 8 q1 q2 absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 20 v v gss gate-source voltage 20 v i d drain current ? continuous (note 1a) 7.5 a ? pulsed 20 power dissipation for single operation (note 1a) 1.6 (note 1b) 1.0 p d (note 1c) 0.9 w t j , t stg operating and storage junction temperature range ?55 to +150 c thermal characteristics r ja thermal resistance, junction-to-ambient (note 1a) 78 c/w r jc thermal resistance, junction-to-case (note 1) 40 c/w package marking and ordering information device marking device reel size tape width quantity fds6911 fds6911 13?? 12mm 2500 units fd s69 11 d ua l n- c h a nn e l l og i c l e v e l p o w e rtr e n c h ? m os fet december 2011 s1 g1 s2 g2 d2 d2 d1 d1
electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 a 20 v bv dss t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 c 28 mv/ c i dss zero gate voltage drain current v ds = 20 v, v gs = 0 v v ds = 20 v, v gs = 0 v, t j = 55 c 1 10 a i gss gate?source leakage v gs = 20 v, v ds = 0 v 100 na on characteristics (note 2) v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 1 1.8 3 v v gs(th) t j gate threshold voltage temperature coefficient i d = 250 a, referenced to 25 c ?4.7 mv/ c r ds(on) static drain?source on?resistance v gs = 10 v, i d = 7.5 a v gs = 4.5 v, i d = 6.5 a v gs = 10 v, i d = 7.5 a,t j = 125 c 10.6 13 14.5 13 17 20 m i d(on) on?state drain current v gs = 10 v, v ds = 5 v 20 a g fs forward transconductance v ds = 5 v, i d = 7.5 a 36 s dynamic characteristics c iss input capacitance 1130 pf c oss output capacitance 300 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 100 pf r g gate resistance v gs = 15 mv, f = 1.0 mhz 2.4 switching characteristics (note 2) t d(on) turn?on delay time 9 18 ns t r turn?on rise time 5 10 ns t d(off) turn?off delay time 26 42 ns t f turn?off fall time v dd = 15 v, i d = 1 a, v gs = 10 v, r gen = 6 7 14 ns q g(tot) total gate charge at vgs=10v 17 24 nc q g total gate charge at vgs=5v 9 13 nc q gs gate?source charge 3.1 nc q gd gate?drain charge v dd = 15 v, i d = 7.5 a, 2.7 nc fds6911 dual n-channel lo g ic level powertrench ? mosfet fds6911 rev c1 www.fairchildsemi.com
electrical characteristics ta = 25c unless otherwise noted symbol parameter test conditions min typ max units drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current 1.3 a v sd drain?source diode forward voltage v gs = 0 v, i s = 1.3 a (note 2) 1.2 v t rr diode reverse recovery time 24 ns q rr diode reverse recovery charge i f = 7.5 a, d if /d t = 100 a/s 13 nc notes: 1. r ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the so lder mounting surface of the drain pins. r jc is guaranteed by design while r ca is determined by the user's board design. a) 78c/w when mounted on a 0.5 in 2 pad of 2 oz copper b) 125c/w when mounted on a .02 in 2 pad of 2 oz copper c) 135c/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 s, duty cycle < 2.0% fds6911 dual n-channel lo g ic level powertrench ? mosfet fds6911 rev c1 www.fairchildsemi.com
typical characteristics 0 4 8 12 16 20 0 0.25 0.5 0.75 1 1.25 1.5 v ds , drain-source voltage (v) i d , drain current (a) 3.0v 4.5v 4.0v v gs = 10.0v 3.5v 0.6 1 1.4 1.8 2.2 2.6 048121620 i d , drain current (a) r ds (on) , normalized drain-source on-resistance v gs = 3.0v 6.0v 5.0 4.5v 4.0 10.0v 3.5v figure 1. on-region characteristics. fi gure 2. on-resistance variation with drain current and gate voltage. 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds (on) , normalized drain-source on-resistance i d = 7.5a v gs = 10v 0 0.01 0.02 0.03 0.04 246810 v gs , gate to source voltage (v) r ds (on) , on-resistance (ohm) i d = 3.8a t a = 125 o c t a = 25 o c figure 3. on-resistance variation with temperature. figure 4. on-resistance variation with gate-to-source voltage. 0 4 8 12 16 20 1.522.533.54 v gs , gate to source voltage (v) i d , drain current (a) t a = 125 o c -55 o c v ds = 5v 25 o c 0.0001 0.001 0.01 0.1 1 10 100 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics. figure 6. body diode forward voltage variation with source current and temperature. fd s69 11 d ua l n- c h a nn e l l og i c l e v e l p o w e rtr e n c h ? m os fet fds6911 rev c1 www.fairchildsemi.com
typical characteristics 0 2 4 6 8 10 0 4 8 12 16 20 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 7.5a v ds = 10v 15v 20v 0 200 400 600 800 1000 1200 1400 0 5 10 15 20 25 30 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics. figure 8. capacitance characteristics. 0.01 0.1 1 10 100 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 10s 1s 100ms 100 s r ds(on) limit v gs = 10v single pulse r ja = 135 o c/w t a = 25 o c 10ms 1ms 0 10 20 30 40 50 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) p(pk), peak transient power (w) single pulse r ja = 135c/w t a = 25c figure 9. maximum safe operating ar ea. figure 10. single pulse maximum power dissipation. 0.001 0.01 0.1 1 0.0001 0.001 0.01 0.1 1 10 100 1000 t 1 , time ( sec ) r(t), normalized effective transient thermal resistance r ja (t) = r(t) * r ja r ja = 135c/w t j - t a = p * r ja (t) duty cycle, d = t 1 / t 2 p (p k ) t 1 t 2 single pulse 0.01 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve. thermal characterization performed using the conditions described in note 1c. transient thermal response will change depending on the circuit board design. fd s69 11 d ua l n- c h a nn e l l og i c l e v e l p o w e rtr e n c h ? m os fet fds6911 rev c1 www.fairchildsemi.com
trademarks the following includes registered and unregistered trademarks and service marks, owned by fairch ild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes with out further notice to any products herein to improve reliability, function, or design. fairchild does not assume an y liability arising out of th e application or use of any product or circuit described herein; neither does it convey an y license under its patent rights, nor the rights of others. these specifications do not expand the term s of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized fo r use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used here in: 1. life support devices or systems ar e devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms 2cool? 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fd s69 11 d ua l n- c h a nn e l l og i c l e v e l p o w e rtr e n c h ? m os fet
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